Instruction scheduling for instruction level parallel processors
نویسندگان
چکیده
منابع مشابه
Instruction Scheduling for Instruction Level Parallel Processors
Nearly all personal computer and workstation processors, and virtually all high-performance embedded processor cores, now embody instruction level parallel (ILP) processing in the form of superscalar or very long instruction word (VLIW) architectures. ILP processors put much more of a burden on compilers; without “heroic” compiling techniques, most such processors fall far short of their perfor...
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ژورنال
عنوان ژورنال: Proceedings of the IEEE
سال: 2001
ISSN: 0018-9219
DOI: 10.1109/5.964443